Static information storage and retrieval – Read/write circuit – Differential sensing
Reexamination Certificate
2006-05-12
2008-05-20
Phung, Anh (Department: 2824)
Static information storage and retrieval
Read/write circuit
Differential sensing
C365S210130
Reexamination Certificate
active
07376031
ABSTRACT:
A semiconductor memory device includes a memory cell including a floating body; a word line connected to a gate of the memory cell; a data bit line connected to the memory cell and transmitting the data stored in the memory cell; a reference bit line transmitting a reference voltage; a data sense node connected to the data bit line and transmitting the data in the memory cell; a reference sense node connected to the reference bit line and transmitting the reference voltage; a plurality of transfer gates connected between the data bit line and the data sense node and between the reference bit line and the reference sense node, respectively; and a current load circuit connected to each of the data sense node and the reference sense node and constituted by a transistor equal in conduction type to the memory cell.
REFERENCES:
patent: 5973983 (1999-10-01), Hidaka
patent: 6469546 (2002-10-01), Matano
patent: 7277341 (2007-10-01), Fujita et al.
patent: 2005/0232043 (2005-10-01), Ohsawa
Kabushiki Kaisha Toshiba
Phung Anh
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