Single-poly EEPROM cell with lightly doped MOS capacitors

Details Single-poly EEPROM cell with lightly doped MOS capacitors Single-poly EEPROM cell with lightly doped MOS capacitors

2005-09-01

2008-05-27

Cao, Phat X (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S321000, C257SE27103

Reexamination Certificate

active

07378705

ABSTRACT:
An Electrically Erasable Programmable Read Only Memory (EEPROM) memory cell and a method of operation are disclosed for creating an EEPROM memory cell in a standard CMOS process. A single polysilicon layer is used in combination with lightly doped MOS capacitors. The lightly doped capacitors employed in the EEPROM memory cell can be asymmetrical in design. Asymmetrical capacitors reduce area. Further capacitance variation caused by inversion can also be reduced by using multiple control capacitors. In addition, the use of multiple tunneling capacitors provides the benefit of customized tunneling paths.

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