Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
1999-11-30
2008-03-25
Schillinger, Laura M. (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S151000, C438S181000
Reexamination Certificate
active
07348227
ABSTRACT:
A TFT having a high threshold voltage is connected to the source electrode of each TFT that constitutes a CMOS circuit. In another aspect, pixel thin-film transistors are constructed such that a thin-film transistor more distant from a gate line drive circuit has a lower threshold voltage. In a further aspect, a control film that is removable in a later step is formed on the surface of the channel forming region of a TFT, and doping is performed from above the control film.
REFERENCES:
patent: 3891468 (1975-06-01), Ito et al.
patent: 4472871 (1984-09-01), Green et al.
patent: 5111266 (1992-05-01), Furumura et al.
patent: 5270224 (1993-12-01), Furumura et al.
patent: 5292675 (1994-03-01), Codama
patent: 5396084 (1995-03-01), Matsumoto
patent: 5403762 (1995-04-01), Takemura
patent: 5485019 (1996-01-01), Yamazaki et al.
patent: 5488000 (1996-01-01), Zhang et al.
patent: 5518937 (1996-05-01), Furumura et al.
patent: 5581092 (1996-12-01), Takemura
patent: 5594371 (1997-01-01), Douseki
patent: 5672541 (1997-09-01), Booske et al.
patent: 5889315 (1999-03-01), Farrenkopf et al.
patent: 5914498 (1999-06-01), Suzawa et al.
patent: 5981974 (1999-11-01), Makita
patent: 6011277 (2000-01-01), Yamazaki
patent: 6013930 (2000-01-01), Yamazaki et al.
patent: 6165876 (2000-12-01), Yamazaki et al.
patent: 6218219 (2001-04-01), Yamazaki et al.
patent: 6235563 (2001-05-01), Oka et al.
patent: 0 690 510 (1996-01-01), None
patent: 57-102067 (1982-06-01), None
patent: 59-161870 (1984-09-01), None
patent: 64-7559 (1989-01-01), None
patent: 03-020046 (1991-01-01), None
patent: 03-189626 (1991-08-01), None
patent: 04-290467 (1992-10-01), None
patent: 04-302147 (1992-10-01), None
patent: 05-082552 (1993-04-01), None
patent: 06-029834 (1994-02-01), None
patent: 08204208 (1996-08-01), None
patent: 08-228145 (1996-09-01), None
patent: 08274344 (1996-10-01), None
patent: 02000208870 (2000-07-01), None
Office Action dated Jun. 21, 2004 from U.S. Appl. No. 08/433,561 (including copy of pending claims as of Nov. 22, 2004).
Kusumoto Naoto
Ohnuma Hideto
Tanaka Koichiro
Yamazaki Shunpei
Schillinger Laura M.
Semiconductor Energy Laboratory Co,. Ltd.
LandOfFree
Semiconductor device and manufacturing method thereof does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device and manufacturing method thereof, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device and manufacturing method thereof will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3969061