Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2006-07-10
2008-07-22
Deo, Duy-Vu (Department: 1792)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S689000, C438S692000, C438S149000
Reexamination Certificate
active
07402525
ABSTRACT:
A gate electrode is formed of a laminate structure comprising a plurality of conductive layers such that the width along the channel of a lower first conductive layer is larger than that of an upper second conductive layer The gate electrode is used as a mask during ion doping for forming an LDD. A mask pattern for forming the gate electrode is processed into an optimum shape in combination with dry etching so that the LDD overlapping with the gate electrode(Lov) is 1 μm or more, and preferably, 1.5 μm or more.
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Chinese Office Action (Application No. 2003145480.1) Dated Feb. 2, 2007 with full English translation.
M. Nagase et al.; “Study of sub-30nm gate Etching Technology”;2001 Dry Process International Symposium; pp. 17-22; 2001.
Angadi Maki
Deo Duy-Vu
Semiconductor Energy Laboratory Co,. Ltd.
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