Trench fet with self aligned source and contact

Details Trench fet with self aligned source and contact Trench fet with self aligned source and contact

2007-11-05

2008-07-08

Quach, Tuan N. (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S409000, C257S488000, C257SE29260, C257SE29009

Reexamination Certificate

active

07397083

ABSTRACT:
A trench type power MOSgated device has a plurality of spaced trenches lined with oxide and filled with conductive polysilicon. The tops of the polysilicon fillers are below the top silicon surface and are capped with a deposited oxide the top of which is flush with the top of the silicon. Source regions of short lateral extent extend into the trench walls to a depth below the top of the polysilicon. A trench termination is formed having an insulation oxide liner covered by a polysilicon layer, covered in turn by a deposited oxide.

REFERENCES:
patent: 4767722 (1988-08-01), Blanchard
patent: 5298442 (1994-03-01), Bulucea et al.
patent: 5614751 (1997-03-01), Yilmaz et al.
patent: 5744386 (1998-04-01), Kenney
patent: 5910669 (1999-06-01), Chang et al.
patent: 5998835 (1999-12-01), Furukawa et al.
patent: 6001678 (1999-12-01), Takahashi
patent: 6163052 (2000-12-01), Liu et al.
patent: 6180981 (2001-01-01), Kinzer et al.
patent: 6188104 (2001-02-01), Choi et al.
patent: 6194741 (2001-02-01), Kinzer et al.
patent: 6236099 (2001-05-01), Boden, Jr.
patent: 6297101 (2001-10-01), Schaeffer
patent: 6309929 (2001-10-01), Hsu et al.
patent: 6331466 (2001-12-01), Takahashi et al.
patent: 6351018 (2002-02-01), Sapp
patent: 6413822 (2002-07-01), Williams et al.
patent: 6437386 (2002-08-01), Hurst et al.
patent: 6534365 (2003-03-01), Kim et al.
patent: 6538280 (2003-03-01), Nakamura
patent: 6977208 (2005-12-01), Chiola
patent: 6987305 (2006-01-01), He et al.
patent: 7202525 (2007-04-01), Kinzer
patent: 2002/0167046 (2002-11-01), Aoki et al.
patent: 2007/0145514 (2007-06-01), Kocon
patent: 11-031815 (1999-02-01), None
Wolf, S., Silicon Processing for the VLSI Era, vol. 3—the Submicron MOSFET, Lattice Press, 1995, pp. 386-373.
Wolf, S., et al., Silicon Processing for the VLSI Era, vol. 1—Process Technology, First Edition, Lattice Press, 1986, p. 124.
Wolf, S. et al., Silicon Processing for the VLSI Era, vol. 1—Process Technology, Second Edition, Lattice Press, 200-. p. 1.
B. Jayant Baliga, “Power Devices”, Chapter 4 in “Modern Semiconductor Device Physics,” S.M. Sze edited, John Wiley & Sons, 1998, pp. 183-185, 211, 215, 217.

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