Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate
2008-04-22
2008-04-22
Auduong, Gene N. (Department: 2827)
Static information storage and retrieval
Read/write circuit
Data refresh
C365S189011
Reexamination Certificate
active
11494748
ABSTRACT:
A memory allowing reduction of the period of an external access operation is provided. This memory comprises an access control portion performing an internal access operation on the basis of an external access operation, a refresh control portion performing a refresh operation and a refresh division control portion dividing the refresh operation into a read operation RFRD and rewrite operations RFRS1and RFRS2. The memory performs the read operation RFRD and the rewrite operations RFRS1and RFRS2at least either before or after different internal access operations corresponding to different external access operations respectively.
REFERENCES:
patent: 4933907 (1990-06-01), Kumanoya et al.
patent: 6421292 (2002-07-01), Kitamoto et al.
patent: 2001-229674 (2001-08-01), None
Matsushita Shigeharu
Miyamoto Hideaki
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