Methods for improved structured ASIC design

Details Methods for improved structured ASIC design Methods for improved structured ASIC design

2008-05-13

2008-05-13

Whitmore, Stacy (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

11301604

ABSTRACT:
In the design of a structured ASIC device that is intended to be functionally equivalent to a programmed FPGA, an initial design for the structured ASIC may be modified in any of several ways to improve various aspects of its performance. For example, for critical or near-critical parts of the structured ASIC design, attempts may be made to permute inputs to improve performance. Alternatively or in addition, Shannon's decomposition or other decomposition may be attempted to move a critical input closer to the output of a cell. Another possible modification is replacement of high-speed adders with slower-speed adders in non-critical parts of the structured ASIC design.

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