System and method for sharing memory by heterogeneous...

Details System and method for sharing memory by heterogeneous... System and method for sharing memory by heterogeneous...

2008-01-22

2008-01-22

Bataille, Pierre-Michel (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Shared memory area

C711S148000

Reexamination Certificate

active

10697897

ABSTRACT:
A system for sharing memory by heterogeneous processors, each of which is adapted to process its own instruction set, is presented. A common bus is used to couple the common memory to the various processors. In one embodiment, a cache for more than one of the processors is stored in the shared memory. In another embodiment, some of the processors include a local memory area that is mapped to the shared memory pool. In yet another embodiment, local memory included on one or more of the processors is partially shared so that some of the local memory is mapped to the shared memory area, while remaining memory in the local memory is private to the particular processor.

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