Protection of Cu damascene interconnects by formation of a...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S627000, C438S687000, C257SE21575

Reexamination Certificate

active

10980076

ABSTRACT:
Methods of protecting exposed metal damascene interconnect surfaces in a process for making electronic components and the electronic components made according to such methods. An integrated circuit structure having damascene regions with exposed metal surfaces is provided into a closed processing chamber, whereby a first reactant is contacted to the exposed metal surfaces to transform a top portion of the metal layer into a protective self-aligned buffer layer. Reacting molecules of the first reactant with metal atoms of this metal layer forms the protective self-aligned buffer layer entirely within such metal layer. Alternatively, adsorbing surface-active reactant molecules onto the exposed metal surface forms the protective self-aligned buffer layer. A second reactant may be contacted to the protective self-aligned buffer layer to form a self-aligned dielectric cap layer directly over the protective self-aligned buffer layer.

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patent: 6181013 (2001-01-01), Liu et al.
patent: 6271595 (2001-08-01), McGahay et al.
patent: 6821890 (2004-11-01), McGahay et al.
patent: 6869873 (2005-03-01), Bradshaw et al.
patent: 7060619 (2006-06-01), Cowley et al.
patent: 2006/0046479 (2006-03-01), Rajagopalan et al.
patent: 2000-252278 (2000-09-01), None

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