Voltage level translator circuitry

Details Voltage level translator circuitry Voltage level translator circuitry

2008-05-20

2008-05-20

JeanPierre, Peguy (Department: 2819)

Electronic digital logic circuitry

Interface

Logic level shifting

Reexamination Certificate

active

11440250

ABSTRACT:
Circuitry and methods for implementing voltage level translators at relatively low source voltages are provided. The circuitry and methods utilize voltage protection circuitry to ensure that voltages in the circuitry do not exceed predetermined thresholds that, if exceeded, would cause malfunction. In one embodiment of the invention, voltage level translation circuitry is provided to boost voltage from a source voltage (e.g., VCC) to a voltage that is higher in potential (e.g., VCCP) than the source voltage. In another embodiment of the invention, voltage level translation circuitry is provided to pull a ground voltage down to a potential (e.g., VBB) that is lower in voltage than the ground voltage.

REFERENCES:
patent: 5321324 (1994-06-01), Hardee et al.
patent: 5936428 (1999-08-01), Merritt et al.
patent: 6064229 (2000-05-01), Morris
patent: 6362942 (2002-03-01), Drapkin et al.
patent: 6472905 (2002-10-01), Manning
patent: 2001/0000654 (2001-05-01), Merritt et al.

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