Method and apparatus to avoid collisions between row...

Details Method and apparatus to avoid collisions between row... Method and apparatus to avoid collisions between row...

2008-01-22

2008-01-22

Sough, Hyung (Department: 2188)

Electrical computers and digital processing systems: memory

Storage accessing and control

Access timing

C711S100000, C711S168000, C711S169000

Reexamination Certificate

active

11008792

ABSTRACT:
A method and apparatus to avoid collisions between row activate and column read or column write commands is presented. A memory controller includes control logic, activate allowed logic, and last column counter logic. The control logic sends particular values to the activate allowed logic and the last column counter logic at the beginning of a read or write operation, such as a new command load value, a read count value, and a write count value. In turn, the control logic receives an activate allowed signal from the activate allowed logic, which indicates the times at which a new activate command may be issued. As a result, the memory controller allows an activate command to commence on “even” command cycles or anytime after the last outstanding column command has been issued.

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