DRAM trench capacitor with recessed pillar

Details DRAM trench capacitor with recessed pillar DRAM trench capacitor with recessed pillar

1996-09-09

1998-08-11

Wojciechowicz, Edward

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257302, 257328, 257330, 257392, H01L 2972

Patent

active

057930775

ABSTRACT:
A method, and resultant structure, is described for fabricating a DRAM trench capacitor with a single pillar recessed below the level of the top surface of the silicon substrate in which it is formed. First and second insulating layers are formed over the silicon substrate, and patterned to form an opening to the silicon substrate. A portion of the silicon substrate is removed in the region defined by the opening, whereby a first trench is formed. Sidewall spacers are formed along the sides of the first trench from a third insulating layer. A first pillar is formed after depositing a first conductive layer between the sidewall spacers and over the trench and removing the first conductive layer except within the first trench. The sidewall spacers are removed. A portion of the silicon substrate in the first trench is removed that is not vertically masked by the pillar, and simultaneously a portion top of the pillar is removed, whereby a second trench and second pillar are formed at a greater depth in the silicon substrate. The remainder of the second insulating layer is also removed. A capacitor dielectric is formed in the second trench over the second pillar. A second conducting layer is formed over the dielectric layer and removed in the region outside of the trench to form the top capacitor electrode.

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