Semiconductor constructions, and methods of forming...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C438S238000, C257SE27048, C257SE21646

Reexamination Certificate

active

11377094

ABSTRACT:
The invention includes methods of incorporating partial SOI into transistor structures. In particular aspects, dielectric material is provided over semiconductor material, and patterned into at least two segments separated by a gap. Additional semiconductor material is then grown over the dielectric material and within the gap. Subsequently, a transistor is formed to comprise source/drain regions within the additional semiconductor material, and to comprise a channel between the source/drain regions. At least one of the source/drain regions is primarily directly over a segment of the dielectric material, and the channel is not primarily directly over any segment of the dielectric material. The invention also includes constructions comprising partial SOI corresponding to segments of dielectric material, and transistors having at least one source/drain region primarily directly over a segment of dielectric material, and a channel that is not primarily directly over any segment of the dielectric material.

REFERENCES:
patent: 4849370 (1989-07-01), Spratt et al.
patent: 6846720 (2005-01-01), Balasubramanian et al.
Yeo, K. et al., “80 nm 512M DRAM with Enhanced Data Retention Time Using Partially-Insulated Cell Array Transistor (PiCAT)”, 2004 Sympos. on VLSI Tech. , Digest of Technical Papers, IEEE 2004, pp. 30-31.

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