Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2008-03-11

2008-03-11

Le, Thong Q. (Department: 2827)

Static information storage and retrieval

Read/write circuit

Including reference or bias voltage generator

C365S226000, C365S225700

Reexamination Certificate

active

11435636

ABSTRACT:
A semiconductor memory device includes a semiconductor chip including a first voltage generating circuit that generates a first voltage in response to a first operation control signal, a second voltage generating circuit that generates a second voltage in response to a second operation control signal, a first operation control circuit that generates the first operation control signal, a second operation control circuit that generates the second operation control signal, a first bonding pad connected to an output of the first voltage generating circuit, and a second bonding pad connected to an output of the second voltage generating circuit. A packaging substrate includes a first substrate pad connected to the first bonding pad and a second substrate pad connected to the second bonding pad. The first and second substrate pads are connected to each other through the packaging substrate.

REFERENCES:
patent: 6538337 (2003-03-01), Song
patent: 2004/0012991 (2004-01-01), Kozaru
patent: 2004/0109368 (2004-06-01), Kuroda
patent: 2005/0162182 (2005-07-01), Ong
patent: 05-029372 (1993-02-01), None
patent: 2004-186435 (2004-07-01), None
patent: 1020010055860 (2001-07-01), None
patent: 1020020014643 (2002-02-01), None
patent: 1020030046223 (2003-12-01), None

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