Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2007-10-09
2007-10-09
Chen, Kin-Chan (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S197000, C438S217000, C438S724000
Reexamination Certificate
active
10919684
ABSTRACT:
A process for fabricating a MOSFET device featuring a channel region comprised with a silicon-germanium component is provided. The process features employ an angled ion implantation procedure to place germanium ions in a region of a semiconductor substrate underlying a conductive gate structure. The presence of raised silicon shapes used as a diffusion source for a subsequent heavily doped source/drain region, the presence of a conductive gate structure, and the removal of dummy insulator previously located on the conductive gate structure allow the angled implantation procedure to place germanium ions in a portion of the semiconductor substrate to be used for the MOSFET channel region. An anneal procedure results in the formation of the desired silicon-germanium component in the portion of semiconductor substrate to be used for the MOSFET channel region.
REFERENCES:
patent: 5683934 (1997-11-01), Candelaria
patent: 5891792 (1999-04-01), Shih et al.
patent: 6350993 (2002-02-01), Chu et al.
patent: 6395624 (2002-05-01), Bruce et al.
patent: 6492216 (2002-12-01), Yeo et al.
patent: 6498359 (2002-12-01), Schmidt et al.
patent: 6544854 (2003-04-01), Puchner et al.
patent: 6657223 (2003-12-01), Wang et al.
patent: 6806151 (2004-10-01), Wasshuber et al.
patent: 6808970 (2004-10-01), Feudel et al.
Streetman, Solid State Electronic Devices, 1990, Prentice Hall, 3rd ed., pp. 300-301, 326-327, 350 and 351.
Wolf et al., Silicon Processing for the VLSI Era, 1986, Lattice Press, vol. 1, pp. 305, 319-321, 325, 327, and 534.
Wolf, Silicon Processing for the VLSI Era, 2002, Lattice Press, vol. 4, p. 249.
Selvakumar, C.R., et al., “SiGe-Channel n-MOSFET by Germanium Implantation,” IEEE Electron Device Letters, vol. 12, No. 8, (Aug. 1991) pp. 444-446.
Chang Sun-Jay
Wu Shien-Yang
Slater & Matsil L.L.P.
Taiwan Semiconductor Manufacturing Company , Ltd.
LandOfFree
Process for fabricating a strained channel MOSFET device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Process for fabricating a strained channel MOSFET device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process for fabricating a strained channel MOSFET device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3902922