Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2007-10-30
2007-10-30
Purvis, Sue A. (Department: 2826)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S197000, C438S198000, C257S347000, C257S348000
Reexamination Certificate
active
10710244
ABSTRACT:
P-type MOSFETs (PMOSFETs) are formed by encapsulating the gate with an insulator and depositing a germanium containing layer outside the sidewalls, then diffusing the germanium into the silicon-on-insulator layer or bulk silicon by annealing or by oxidizing to form graded embedded silicon-germanium source-drain and/or Extension (geSiGe-SDE). For SOI devices, the geSiGe-SDE is allowed to reach the buried insulator to maximize the stress in the channel of SOI devices, which is beneficial for ultra-thin SOI devices. Graded germanium profiles provide a method to optimize stress in order to enhance device performance. The geSiGe-SDE creates a compressive stress in the horizontal direction (parallel to the gate dielectric surface) and tensile stress in the vertical direction (normal to the gate dielectric surface) in the channel of the PMOSFET, therebyforming a structure that enhances PMOSFET performance.
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Abate Joseph P.
Erdem Fazli
Purvis Sue A.
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