Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Output switching noise reduction
Reexamination Certificate
2007-08-14
2007-08-14
Le, Don (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Output switching noise reduction
C326S083000, C326S112000
Reexamination Certificate
active
11422973
ABSTRACT:
An efficient design methodology in accordance with the present invention is described for reducing the leakage power in CMOS circuits. The method and apparatus in accordance with the present invention yields better leakage reduction as the threshold voltage decreases and hence aids in further reduction of supply voltage and minimization of transistor sizes. Unlike other leakage control techniques, the technique of the present invention does not need any control circuitry to monitor the states of the circuit. Hence, avoiding the sacrifice of obtained leakage power reduction in the form of dynamic power consumed by the additional circuitry to control the overall circuit states.
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Hanchate Narender
Ranganathan Nagarajan
Le Don
Sauter Molly L.
Smith & Hopen , P.A.
University of South Florida
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