Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2007-08-14
2007-08-14
Geyer, Scott B. (Department: 2812)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C438S125000, C438S126000, C438S127000, C257SE21001, C257S023000
Reexamination Certificate
active
11420822
ABSTRACT:
A substrate structure comprising a substrate; a solder mask is formed over the substrate; and a metal trace structure formed within the solder mask. The metal trace structure including a channel therein for the receipt of underfill. The metal trace structure further including a central portion with arms radiating outwardly therefrom, dividing the solder mask into separate areas. A method of underfilling a chip wherein a chip having a pattern of solder bumps formed on the underside of the chip is placed underside first onto the metal trace structure of the present invention. The solder bump pattern including openings over the metal trace structure. Underfill is introduced into the metal trace structure so that the underfill flows from the metal trace structure and between the solder bumps to underfill the chip.
REFERENCES:
patent: 5329423 (1994-07-01), Scholz
patent: 5647123 (1997-07-01), Greenwood et al.
patent: 5697148 (1997-12-01), Lance et al.
patent: 5990545 (1999-11-01), Schueller et al.
patent: 6194243 (2001-02-01), Akram et al.
patent: 6414849 (2002-07-01), Chiu
patent: 6570261 (2003-05-01), Farquhar et al.
patent: 6600217 (2003-07-01), Onodera et al.
patent: 6772512 (2004-08-01), Tsai et al.
patent: 6777814 (2004-08-01), Iwasaki et al.
patent: 7075016 (2006-07-01), Lee et al.
patent: 7087994 (2006-08-01), Lee
patent: 2002/0011656 (2002-01-01), Swanson et al.
Lee Hsin-Hui
Su Chao-Yuan
Geyer Scott B.
Roman Angel
Taiwan Semiconductor Manufacturing Co. Ltd.
Thomas Kayden Horstemeyer & Risley
LandOfFree
Underfilling efficiency by modifying the substrate design of... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Underfilling efficiency by modifying the substrate design of..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Underfilling efficiency by modifying the substrate design of... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3891964