Retry of a device read transaction

Details Retry of a device read transaction Retry of a device read transaction

2007-02-13

2007-02-13

Bataille, Pierre-Michel (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Shared memory area

C711S145000

Reexamination Certificate

active

10749924

ABSTRACT:
An apparatus (11) causes invalid data to be read again from a memory device (12, 13) before being read by a device (10). A transaction queue (22) stores pending and dispatched device transactions, the queue includes an input for receiving (21) transactions, an output for dispatching (26) transactions, a pointer for pending transactions, and a pointer for dispatched transactions. A master controller (42) responds to an invalid data signal by preventing the transaction queue from dispatching pending transactions to the memory device, by causing the transaction queue to dispatch again the device read transaction which resulted in the invalid data and, subsequently, by causing the data which was read again from the memory device to be accepted by the destination device, by setting the dispatched transaction pointer to the pending transactions pointer, and by enabling the transaction queue to dispatch pending transactions to the memory device.

REFERENCES:
patent: 5570297 (1996-10-01), Brzezinski et al.
patent: 5829033 (1998-10-01), Hagersten et al.
patent: 5881262 (1999-03-01), Abramson et al.

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