Method of LSI designing and a computer program for designing...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

10993490

ABSTRACT:
An LSI designing method using one or more functional blocks each containing two or more flip flops, includes the following: preparing a timing model which can be used under a first mode and a second mode; performing functional design of some functional elements each of which includes one or more functional blocks; carrying out logic composition with respect to the functional elements decided by the functional design using the timing model of the functional blocks under the first mode; performing a first timing analysis with respect to the functional elements on which logic composition was carried out using the timing model under the first mode; performing layout based on the result of the logic composition and the first timing analysis; and performing a second timing analysis after the layout using the timing model under the second mode.

REFERENCES:
patent: 5452239 (1995-09-01), Dai et al.
patent: 5956257 (1999-09-01), Ginetti et al.
patent: 6218861 (2001-04-01), Sudo et al.
patent: 6609241 (2003-08-01), Yonemori

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