General input/output architecture, protocol and related...

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture

Reexamination Certificate

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Reexamination Certificate

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10227599

ABSTRACT:
An enhanced general input/output communication architecture, protocol and related methods are presented.

REFERENCES:
patent: 4430700 (1984-02-01), Chadima, Jr. et al.
patent: 4475192 (1984-10-01), Fernow et al.
patent: 4791639 (1988-12-01), Afheldt et al.
patent: 5001707 (1991-03-01), Kositpaiboon et al.
patent: 5007051 (1991-04-01), Dolkas et al.
patent: 5140587 (1992-08-01), Mueller et al.
patent: 5164938 (1992-11-01), Jurkevich et al.
patent: 5289461 (1994-02-01), de Nijs
patent: 5315586 (1994-05-01), Charvillat
patent: 5353282 (1994-10-01), Dormer
patent: 5353382 (1994-10-01), Yariv et al.
patent: 5450411 (1995-09-01), Heil
patent: 5457701 (1995-10-01), Wasilewski et al.
patent: 5463620 (1995-10-01), Sriram
patent: 5463629 (1995-10-01), Ko
patent: 5463762 (1995-10-01), Morrissey et al.
patent: 5491694 (1996-02-01), Oliver et al.
patent: 5513314 (1996-04-01), Kandasamy et al.
patent: 5561669 (1996-10-01), Lenney et al.
patent: 5583995 (1996-12-01), Gardner et al.
patent: 5600644 (1997-02-01), Chang et al.
patent: 5633867 (1997-05-01), Ben-Nun et al.
patent: 5668810 (1997-09-01), Cannella, Jr.
patent: 5689550 (1997-11-01), Garson et al.
patent: 5745837 (1998-04-01), Fuhrmann
patent: 5748613 (1998-05-01), Kilk et al.
patent: 5748629 (1998-05-01), Caldara et al.
patent: 5771387 (1998-06-01), Young et al.
patent: 5852602 (1998-12-01), Sugawara
patent: 5867480 (1999-02-01), Thomas et al.
patent: 5875308 (1999-02-01), Egan et al.
patent: 5923655 (1999-07-01), Veschi et al.
patent: 5935224 (1999-08-01), Svancarek et al.
patent: 5948136 (1999-09-01), Smyers
patent: 5953338 (1999-09-01), Ma et al.
patent: 5958064 (1999-09-01), Judd et al.
patent: 6003062 (1999-12-01), Greenberg et al.
patent: 6044081 (2000-03-01), Bell et al.
patent: 6044406 (2000-03-01), Barkey et al.
patent: 6137793 (2000-10-01), Gorman et al.
patent: 6157972 (2000-12-01), Newman et al.
patent: 6208645 (2001-03-01), James et al.
patent: 6215789 (2001-04-01), Keenan et al.
patent: 6249819 (2001-06-01), Hunt et al.
patent: 6253334 (2001-06-01), Amdahl et al.
patent: 6266345 (2001-07-01), Huang
patent: 6269464 (2001-07-01), Boussina et al.
patent: 6343260 (2002-01-01), Chew
patent: 6347097 (2002-02-01), Deng
patent: 6381672 (2002-04-01), Strongin et al.
patent: 6393506 (2002-05-01), Kenny
patent: 6400681 (2002-06-01), Bertin et al.
patent: 6512767 (2003-01-01), Takeda et al.
patent: 6542467 (2003-04-01), Umayabashi
patent: 6601056 (2003-07-01), Kagle et al.
patent: 6625146 (2003-09-01), Merchant et al.
patent: 6639919 (2003-10-01), Kroninger et al.
patent: 6751214 (2004-06-01), Parruck et al.
patent: 6763025 (2004-07-01), Leatherbury et al.
patent: 6765885 (2004-07-01), Jiang et al.
patent: 6810396 (2004-10-01), Blumenau et al.
patent: 6891881 (2005-05-01), Trachewsky et al.
patent: 6976201 (2005-12-01), Shin et al.
patent: 2001/0005897 (2001-06-01), Kawagishi et al.
patent: 2001/0047383 (2001-11-01), Dutta
patent: 2002/0112084 (2002-08-01), Deen et al.
patent: 2002/0152346 (2002-10-01), Stone et al.
patent: 2002/0178243 (2002-11-01), Collins
patent: 0696154 (1996-02-01), None
patent: 0713347 (1996-05-01), None
patent: 0 908 823 (1999-04-01), None
patent: 1001574 (2000-05-01), None
patent: 1049019 (2000-11-01), None
patent: WO 99/00737 (1999-01-01), None
patent: WO 01/13564 (2001-02-01), None
American Megatrends, Inc. “will IEEE 1394 Ultimately Replace USB?” Mar. 11, 1998.
ANONYMOUS, “Intel 82806AA PCI 64 Hub (P64H),” Intel Corporation, Mar. 2001, pp. 1-95, XP002224838, Retrieved from the Internet on Dec. 12, 2002: <URL:http://www.intel.com/design/chipsets/datashts/29802502.pdf>.
“Infiniband Architecture Release 1.0, vol. 1, General Specifications,” INFINIBANDTM Architecture Specification, Oct. 24, 2000, pp. 1-880, XP-002214159, InfiniBand SM Trade Association.
S. Kamolphiwong et al., “Flow Control in ATM Networks: A Survey,” Computer Communications, vol. 21, No. 11, Aug. 10, 1998, pp. 951-968, XP-004138768, Elsevier Science Puslishers BV, Amsterdam, NL.
“A Dynamic Bandwidth Allocation Scheme for ATM Networks” by Tsai, Z.; Wang, W.D.; J.F. (abstract only) Publication Date: Mar. 23-26, 1993.
“Bandwidth Allocation and Routing in Virtual Path Based ATM Networks” by Wong, E.W.M.; Chan, A.K.M.; Chan, S.C.H.; Ko, K.T (abstract only) Publication Date: Jun. 23-27, 1996.
“A Network Management Architecture for Robust Packet Routing in Mesh Optical Access Networks” by M. Medard et al. Publication Date: May 2000.

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