Methods and systems employing a flag for deferring exception...

Electrical computers and digital processing systems: processing – Processing control – Branching

Reexamination Certificate

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C712S024000, C712S218000

Reexamination Certificate

active

10406022

ABSTRACT:
Methods and systems thereof for exception handling are described. An event to be handled is identified during execution of a code sequence. A bit is set to indicate that handling of the event is to be deferred. An exception corresponding to the event is generated if the bit is set.

REFERENCES:
patent: 5537559 (1996-07-01), Kane et al.
patent: 5625835 (1997-04-01), Ebcioglu et al.
patent: 5692169 (1997-11-01), Kathail et al.
patent: 5721927 (1998-02-01), Baraz et al.
patent: 5748936 (1998-05-01), Karp et al.

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