Electronic circuit having variable biasing

Details Electronic circuit having variable biasing Electronic circuit having variable biasing

2007-06-26

2007-06-26

Lam, David (Department: 2827)

Static information storage and retrieval

Read/write circuit

Including reference or bias voltage generator

C365S189011, C365S177000, C365S185270

Reexamination Certificate

active

11184698

ABSTRACT:
Techniques are provided for selectively biasing wells in a circuit, such as a Complementary Metal Oxide Semiconductor (CMOS) circuit, that has two types of transistors, one type formed on a substrate and another type formed on the wells. For example, the circuit can be a memory circuit, and the selective well bias can be changed depending on whether a READ or WRITE operation is being conducted. In another aspect, cells in a memory circuit can be subjected to variable bias depending on conditions, such as, again, whether a READ or WRITE operation is underway.

REFERENCES:
patent: 6510088 (2003-01-01), Chen et al.
patent: 6576505 (2003-06-01), Borghs et al.
patent: 6911703 (2005-06-01), Hidaka
Joshi, Rajiv V., “Random Access Memory with Stability Enhancement and Early Read Elimination,” U.S. Appl. No. 10/985,453, filed Nov. 10, 2004.

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