Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate
2007-12-04
2007-12-04
Nguyen, VanThu (Department: 2824)
Static information storage and retrieval
Read/write circuit
Data refresh
C365S189040, C365S233100
Reexamination Certificate
active
11790832
ABSTRACT:
According to the present invention, a memory circuit requiring refresh operations a first circuit which receives a command in synchronization with a clock signal, and which generates a first internal command internally and a second circuit which generates a second internal command, e.g., a refresh command, internally in a prescribed refresh cycle. And an internal circuit, according to said first internal command, executes corresponding control through clock-synchronous operations, and when said refresh command is issued, sequentially executes control corresponding to the refresh command and control corresponding to said first internal command through clock-asynchronous operations. According to the present invention, when a refresh timing signal is generated, the refresh operation can be intrupted among the external command operations.
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Arent & Fox LLP
Fujitsu Limited
Nguyen Van-Thu
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