Apparatus for iterative hard-decision forward error...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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C714S794000, C714S795000

Reexamination Certificate

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10113488

ABSTRACT:
An apparatus for iterative hard-decision forward error correction decoding is described. The apparatus comprises a binary receiver to convert an optical signal to an electrical signal, the electrical signal having a set of information symbols and a set of redundancy symbols, the set of redundancy symbols generated by different forward error correction (FEC) encoding schemes, and a plurality of decoders coupled with the binary receiver and coupled together, each of the decoders to decode the set of information symbols with the set of redundancy symbols in accordance with the different FEC encoding schemes.

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Office Action mailed May 31, 2006 for co-pending U.S. Appl. No. 10/113,190.

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