Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2007-08-07
2007-08-07
Peugh, Brian R. (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S145000
Reexamination Certificate
active
11280442
ABSTRACT:
A method of operating a sub-sector cache includes receiving a request for a first sub-sector of a first cache line. The method further includes identifying a first replaced line in a cache data RAM, the first replaced line including a plurality of replaced sub-sectors. The method further includes storing the first sub-sector in the cache data RAM in place of a first replaced sub-sectors and storing an identifier of at least a second replaced sub-sector in a victim sector tag buffer.
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Intel Corporation
Peugh Brian R.
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