Semiconductor memory cell having a trench and a planar...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S304000, C257S305000, C257SE27092

Reexamination Certificate

active

10913797

ABSTRACT:
A trench (12) of a semiconductor memory cell (1) has an insulation collar (44), which is open toward the substrate (42) on just one side (50). On the other side (52), the insulation collar (44, 47, 55) rises all the way up to the insulation cover (62). There is therefore no need for a shallow trench isolation. The contact (70) which is buried on one side is formed by oblique implantation, for example with N2or argon, the implantation taking place from a fixedly predetermined direction with an angle of inclination of between 15 and 40°. The implantation substances effect different etching or oxidation properties, etc., of the implanted materials. In combination with this method, it becomes possible to realize a new layout for the semiconductor memory cell (1), in which the structures for forming the active areas form long lines (31) extending over a plurality of adjacent semiconductor memory cells.

REFERENCES:
patent: 5867420 (1999-02-01), Alsmeier
patent: 5936271 (1999-08-01), Alsmeier et al.
patent: 5945704 (1999-08-01), Schrems et al.
patent: 6018174 (2000-01-01), Schrems et al.
patent: 6100131 (2000-08-01), Alsmeier
patent: 6265741 (2001-07-01), Schrems
patent: 6399977 (2002-06-01), Alsmeier
patent: 2004/0159873 (2004-08-01), Goldbach et al.
patent: 0 908 948 (1999-04-01), None
patent: 0 949 684 (1999-10-01), None

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