Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate
2007-08-21
2007-08-21
Phung, Anh (Department: 2824)
Static information storage and retrieval
Read/write circuit
Data refresh
C365S230030, C365S194000
Reexamination Certificate
active
11604947
ABSTRACT:
A refresh control circuit for use in a semiconductor memory device having a plurality of banks, including: a bank number signal generator for generating a plurality of bank number signals having a predetermined delay time between generation timings of the plurality of bank number signals based on a refresh signal and a reference signal; and a bank selection unit for generating a plurality of bank selection signals in response to the plurality of bank number signals and a piled-refresh control signals to thereby refresh the plurality of banks.
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Kang Shin-Deok
Kwak Jong-Tae
Blakely & Sokoloff, Taylor & Zafman
Hynix / Semiconductor Inc.
Le Toan
Phung Anh
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