Apparatus and method for trace stream identification of a...

Details Apparatus and method for trace stream identification of a... Apparatus and method for trace stream identification of a...

2007-06-26

2007-06-26

Chu, Gabriel (Department: 2114)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C714S034000, C717S128000

Reexamination Certificate

active

10729639

ABSTRACT:
When a RESET signal is generated in a target processor during a test procedure, a reset sync marker is generated in a program counter trace stream. The reset sync marker includes a plurality of packets, the packets identifying that the reset sync marker is the result of a RESET signal. The packets identify the program counter address at the time of the generation of the RESET signal and relate the reset sync marker to a timing trace stream. When the RESET signal is removed, a second (reset-off) sync marker is generated identifying the removal of the RESET signal, identifying the program counter address, and relating the second sync marker to the timing trance stream.

REFERENCES:
patent: 5440700 (1995-08-01), Kaneko
patent: 6205560 (2001-03-01), Hervin et al.
patent: 6314530 (2001-11-01), Mann
patent: 7039834 (2006-05-01), Orfali
patent: 7051197 (2006-05-01), Agarwala et al.
patent: 2002/0178403 (2002-11-01), Floyd et al.
Why All Reset Signals Are Active Low? by Ashok Masilamani and Selvaraj Subramanian http://www.qsl.net/wb6tpu/si-list/0030.html posted Mar. 5, 2001.

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