Semiconductor integrated circuit, method of designing...

Details Semiconductor integrated circuit, method of designing... Semiconductor integrated circuit, method of designing...

2007-02-13

2007-02-13

Garbowski, Leigh M. (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

Reexamination Certificate

active

10778362

ABSTRACT:
Placement is performed by using a library created by enlarging cell frames of at least one type of cells out of a plurality of types of standard cells constituted by using transistors having different characteristics for the respective types of cell. More preferably, the overlap between cells is judged by using unenlarged cell frames as adjacent boundaries for standard cells of the same type, and the overlap between cells is judged by using enlarged cell frames as adjacent boundaries for standard cells of different types. This enables automatic placement in which different types of cells are mixed.

REFERENCES:
patent: 5369595 (1994-11-01), Gould et al.
patent: 5768146 (1998-06-01), Jassowski
patent: 8-87533 (1996-04-01), None

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