Three-dimensional interconnect resistance extraction using...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C703S002000

Reexamination Certificate

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11032720

ABSTRACT:
A method and apparatus calculate resistance of a three-dimensional conductor system defined by boundary faces. The resistance calculation includes (a) partitioning the three-dimensional shape into a plurality of parallelepipeds, a boundary between two parallelepipeds forms and entire face for both of the two parallelepipeds, (b) determining at least one source face and at least one sink face from among the boundary faces, a current entering the conductor system through the source face and leaving the conductor system through the sink face, (c) setting boundary conditions with respect to the current for each of the parallelepipeds, (d) calculating power for each of the parallelepipeds with the boundary conditions, (e) calculating power for the conductor system based on the power and the boundary conditions of each of the parallelepipeds, and (f) obtaining the resistance of the conductor system by minimizing dissipation of the calculated power of the conductor system.

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