Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2007-06-05
2007-06-05
Pham, Long (Department: 2814)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S618000
Reexamination Certificate
active
11338775
ABSTRACT:
A semiconductor integrated circuit device having a plurality of circuit elements and a plurality of wires connecting the circuit elements, includes an orthogonal wire having a first minimum wire width which is formed on a first wiring layer and extends horizontally or vertically; a diagonal wire having a second minimum wire width which is substantially equal to the first minimum wire width, formed on a second wiring layer which differs from the first wiring layer and extending in a diagonal direction in relation to the orthogonal wire; and a via having a size which is no greater than the first or second wire width, formed at point at which the orthogonal wire and diagonal wire overlap so as to connect the orthogonal wire and diagonal wire, wherein one of the diagonal wire and orthogonal wire includes an enlarged wire width region in the position at which the via is formed, the wire width of the enlarged wire width region being enlarged beyond the first or second minimum wire width.
REFERENCES:
patent: 6546540 (2003-04-01), Igarashi et al.
patent: 2000-082743 (2000-03-01), None
patent: 2001-142931 (2001-05-01), None
Fujitsu Limited
Pham Long
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