Semiconductor memory array of floating gate memory cells...

Details Semiconductor memory array of floating gate memory cells... Semiconductor memory array of floating gate memory cells...

2007-02-20

2007-02-20

Jackson, Jerome (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S315000, C257S321000, C257SE29300

Reexamination Certificate

active

10872052

ABSTRACT:
A method of forming a floating gate memory cell array, and the array formed thereby, wherein a trench is formed into the surface of a semiconductor substrate. The source and drain regions are formed underneath the trench and along the substrate surface, respectively, with a non-linear channel region therebetween. The floating gate has a lower portion disposed in the trench and an upper portion disposed above the substrate surface and having a lateral protrusion extending parallel to the substrate surface. The lateral protrusion is formed by etching a cavity into an exposed end of a sacrificial layer and filling it with polysilicon. The control gate is formed about the lateral protrusion and is insulated therefrom. The trench sidewall meets the substrate surface at an acute angle to form a sharp edge that points toward the floating gate and in a direction opposite to that of the lateral protrusion.

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