Semiconductor device having isolation pattern in interlayer...

Details Semiconductor device having isolation pattern in interlayer... Semiconductor device having isolation pattern in interlayer...

2007-01-02

2007-01-02

Chen, Jack (Department: 2813)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S306000

Reexamination Certificate

active

11001596

ABSTRACT:
A semiconductor device having an isolation pattern inside an interlayer insulating layer between capacitor contact plugs and methods of fabrication the same: The semiconductor device includes an interlayer insulating layer covering a semiconductor substrate. At least two contact plugs passing the interlayer insulating layer and connected to the semiconductor substrate. An insulating layer pattern, which is formed of a material having an etch rate lower than that of the interlayer insulating layer, covers the interlayer insulating layer between the neighboring contact plugs. An isolation pattern, which is formed of a material having an etch rate lower than that of the interlayer insulating layer, is extended from the insulating layer pattern and located inside the interlayer insulating layer between the neighboring contact plugs. A charge storage electrode contacts the contact plug.

REFERENCES:
patent: 5597756 (1997-01-01), Fazan et al.
patent: 6150230 (2000-11-01), Kotecki et al.
patent: 6501119 (2002-12-01), Ohno
patent: 2001-0111864 (2001-12-01), None
patent: 2002-0025331 (2002-04-01), None
English language abstract of Korean Publication No. 2001-0111864.
English language abstract of Korean Publication No. 2002-0025331.

Affiliated with

Also associated with

Rating

Semiconductor device having isolation pattern in interlayer... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor device having isolation pattern in interlayer..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device having isolation pattern in interlayer... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3822612