Integrated circuit verification method

Details Integrated circuit verification method Integrated circuit verification method

2007-05-08

2007-05-08

Dinh, Paul (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

10987860

ABSTRACT:
A method for verifying an integrated circuit comprising components connected by connections, the integrated circuit being defined by “physical” and “schematic” representations, comprising the steps of: establishing an annotated physical description of the circuit which enables associating with each connection of the schematic representation several polygons of the physical representation forming a track; defining at least one type of electric signal capable of propagating on the connections; defining, for each signal type, rules to be verified by each track on which the considered type of signal can propagate, specific geometric features of a given track and/or features relative to the positioning of a given track with respect to other tracks having to be verified for each rule; determining, for each connection, whether the tracks associated with the studied connections verify the rules corresponding to the signal types capable of propagating on each connection.

REFERENCES:
patent: 5787006 (1998-07-01), Chevallier et al.
patent: 6077308 (2000-06-01), Carter et al.
patent: 6230299 (2001-05-01), McSherry et al.
patent: 6289412 (2001-09-01), Yuan et al.
patent: 6363516 (2002-03-01), Cano et al.
patent: 6438729 (2002-08-01), Ho
patent: 6480995 (2002-11-01), Schmidt et al.
patent: 2002/0138813 (2002-09-01), Teh et al.
patent: 2002/0166108 (2002-11-01), Rittman
patent: 2004/0194040 (2004-09-01), Joshi et al.
European Search Report dated Aug. 8, 2005 for related European Patent Application No. EP 04105742.

Affiliated with

Also associated with

Rating

Integrated circuit verification method does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Integrated circuit verification method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated circuit verification method will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3818725