Method of making empty space in silicon

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Total dielectric isolation

Reexamination Certificate

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C438S422000, C257S522000, C257SE21564, C257SE21573

Reexamination Certificate

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11340594

ABSTRACT:
To change a plurality of trenches to one flat empty space by two-dimensionally forming the trenches on the surface of a semiconductor substrate and then applying heat treatment to the semiconductor substrate.

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Notification of Reasons for Rejection issued by the Japanese Patent Office, mailed Feb. 6, 2007, in Japanese Application No. 2000-252881 and English translation of Notification.

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