Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering
Reexamination Certificate
2007-05-08
2007-05-08
Fleming, Fritz (Department: 2181)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output data buffering
C358S001160, C358S001170, C709S230000, C710S001000, C710S004000, C710S055000, C710S066000, C710S307000, C710S310000
Reexamination Certificate
active
10173103
ABSTRACT:
Buffer control means and output control means are included within a buffering apparatus. Data longer than the width of data bus is read by single access from buffer means. Rather than signal line control for each bus width, signal line control for each data group is performed by a method wherein address administration means holds address information in relationship with each group of a series of data written in the buffer means and data is output from the buffer means.
REFERENCES:
patent: 5487137 (1996-01-01), Matsuhira
patent: 5-265940 (1993-10-01), None
patent: 2642652 (1997-05-01), None
Fleming Fritz
Foley & Lardner LLP
Franklin Richard
NEC Corporation
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