Architectural level throughput based power modeling...

Details Architectural level throughput based power modeling... Architectural level throughput based power modeling...

2007-07-24

2007-07-24

Dinh, Paul (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C703S018000

Reexamination Certificate

active

10960730

ABSTRACT:
A method for estimating power dissipated by processor core processing a workload includes analyzing a reference test case to generate a reference workload characteristic, analyzing an actual workload to generate an actual workload characteristic, performing a power analysis for the reference test case to establish a reference power dissipation value and estimating an actual workload power dissipation value responsive to the actual and reference workload characteristics and the reference power dissipation value.

REFERENCES:
patent: 5940779 (1999-08-01), Gaitonde et al.
patent: 6212665 (2001-04-01), Zarkesh et al.
patent: 6598209 (2003-07-01), Sokolov
patent: 6895561 (2005-05-01), Blatt et al.
patent: 2002/0133792 (2002-09-01), Raghunathan et al.
patent: 2002/0138809 (2002-09-01), Roethig et al.
patent: 2003/0037270 (2003-02-01), Venkitakrishnan
patent: 2003/0110020 (2003-06-01), Blatt et al.
patent: 2003/0125922 (2003-07-01), Grochowski et al.
patent: 2005/0154573 (2005-07-01), Maly et al.
patent: 2005/0257078 (2005-11-01), Bose et al.
David Brooks, et al., “A Framework for Architectural-Level Power Analysis and Optimizations” Vancouver BC Canada, pp. 83-94 Copy Right ACM 2000.
N. Vijaykrishnan, et al., Energy-Driven Integrated Hardware-Software Optimizations Using SIM 2000 Vancouver BC Canada, pp. 95-106 Copy Right ACM 2000.
David Brooks, et al., “New Methodology for Early-Stage, Microarchitecture-Level Power-Perform Microprocessors” IBM J. Res. & Dev. vol. 47 No. 5/6 Sep./Nov. 2003, pp. 653-670.

Affiliated with

Also associated with

Rating

Architectural level throughput based power modeling... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Architectural level throughput based power modeling..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Architectural level throughput based power modeling... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3808047