Multi-transistor layout capable of saving area

Details Multi-transistor layout capable of saving area Multi-transistor layout capable of saving area

2007-11-13

2007-11-13

Lewis, Monica (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S173000, C257S355000, C257S356000, C257S360000

Reexamination Certificate

active

10908827

ABSTRACT:
A multi-transistor layout capable of saving area includes a substrate; a common drain comprising four sides formed over the substrate; four gates formed over the four sides of the common drain; and four sources formed over outer sides of the four gates corresponding to the common drain.

REFERENCES:
patent: 4546453 (1985-10-01), Noufer
patent: 6477023 (2002-11-01), Tang et al.
patent: 6798022 (2004-09-01), Kuroda et al.

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