Semiconductor memory element, semiconductor memory...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S314000, C257S320000

Reexamination Certificate

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10486184

ABSTRACT:
A semiconductor memory element has a substrate, in which a source region and a drain region are formed, a floating gate electrically insulated from the substrate, and a tunnel barrier arrangement, via which charging or discharging of the floating gate can be performed. It is possible to alter the conductivity of a channel between source and drain regions by charging or discharging the floating gate. A source line is electrically conductively connected to the source region and controls the charge transmission of the tunnel barrier arrangement.

REFERENCES:
patent: 5679970 (1997-10-01), Hartmann
patent: 5763913 (1998-06-01), Jeong
patent: 0 843 360 (1998-05-01), None
patent: 0 935 291 (1999-08-01), None

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