Data detection circuit and method

Details Data detection circuit and method Data detection circuit and method

2007-05-01

2007-05-01

Kumar, Pankaj (Department: 2611)

Pulse or digital communications

Synchronizers

C375S340000, C369S059170

Reexamination Certificate

active

10448033

ABSTRACT:
A data detection circuit and method detect a first bit that is the least significant among bits having a value 1 in N-bit input binary data and a second bit that is the second least significant among bits having the value 1 in the N-bit input data. The data detection method includes the steps of receiving N-bit input data, detecting the first bit that is the least significant among bits having the first value in the received N-bit input data, changing only the value of the detected first bit in the N-bit input data into a second value, and outputting thus generated N-bit intermediate data, in response to a clock signal, and then receiving the N-bit intermediate data, detecting a second bit that is the least significant among bits having the first value in the received N-bit intermediate data, and outputting the detection result, in response to an inverted signal of the clock signal.

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patent: 5754458 (1998-05-01), Beraha et al.
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patent: 6233213 (2001-05-01), Okada et al.
patent: 2003/0118118 (2003-06-01), Yin et al.

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