Semiconductor device and method of fabricating the same

Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of...

Reexamination Certificate

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C257SE31041

Reexamination Certificate

active

11049671

ABSTRACT:
A semiconductor device including a gate insulating film selectively formed on a predetermined region of a semiconductor substrate; a gate electrode formed on said gate insulating film; and a source region and drain region formed, in a surface portion of said semiconductor substrate, on two sides of a channel region positioned below said gate electrode; wherein a carbon concentration in an interface where said gate insulating film is in contact with said gate electrode is not more than 5×1022atoms/cm3.

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patent: 6613658 (2003-09-01), Koyama et al.
patent: 2005/0271813 (2005-12-01), Kher et al.
patent: 9-312267 (1997-12-01), None
patent: 2002-118160 (2002-04-01), None
patent: 2003-068731 (2003-03-01), None
patent: 2004-071696 (2004-03-01), None
patent: 2004-186567 (2004-07-01), None
Katsuyuki Sekine, et al.; “Nitrogen Profile Control by Plasma Nitridation Technique for Poly-Si Gate HfSiON CMOSFET with Excellent Interface Property and Ultra-low Leakage Current”; 2003 IEDM, Dig. Tech. Papers, pp. 103-106; (2003).
Notification of Reason for Rejection issued by the Japanese Patent Office on Feb. 6, 2007, for Japanese Patent Application No. 2004-317773, and English-language translation thereof.

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