Error detection/correction and fault detection/recovery – Pulse or data error handling – Replacement of memory spare location – portion – or segment
Reexamination Certificate
2007-01-02
2007-01-02
Britt, Cynthia (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Replacement of memory spare location, portion, or segment
C365S201000
Reexamination Certificate
active
10610186
ABSTRACT:
A memory chip includes an on-chip data generator, a scrambler unit for checking the correct operability of the memory cells, a repair unit, and redundant word lines that, in the case of a memory cell recognized as defective, are used instead of the word line regularly activated. The scrambler unit is connected to the repair unit and, thus, receives from the repair unit information on whether the redundant word line replacing a defective word line drives transistors of memory cells that can be connected to true bit lines or to complementary bit lines. As such, the scrambler unit can take the information as to whether a true bit line or a complementary bit line is driven through the spare word line into consideration when performing the test procedure. This provides for a more efficient performance of the test procedure. Also provided is a method for testing memory cells.
REFERENCES:
patent: 6182257 (2001-01-01), Gillingham
patent: 6421284 (2002-07-01), Sakata
patent: 1 150 211 (2001-10-01), None
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