Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-09-11
2007-09-11
Whitmore, Stacy A. (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
10340005
ABSTRACT:
A method of specifying clock domains in electronic circuit designs in a system level design tool is disclosed. The method generally comprises steps of providing a design having a plurality of functional blocks; incorporating a clock tag block within the design; and setting a clock domain provided by the clock tag block for a functional block of the plurality of functional blocks. A design tool enabling the association of clock domains with functional blocks in a system is also disclosed. The design tool generally comprises a plurality of functional blocks; a clock tag block having a predetermined clock rate; and a user interface enabling the selection of the functional blocks and the clock tag block in a design. The clock tag block provides a clock rate for at least one functional block of the plurality of functional blocks.
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Ballagh Jonathan B.
Milne Roger B.
Stroomer Jeffrey D.
Dimyan Magid Y.
King John J.
Whitmore Stacy A.
Xilinx , Inc.
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