Systems and methods for reducing static and total power...

Electrical computers and digital processing systems: support – Computer power control – Power conservation

Reexamination Certificate

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Details

C713S300000, C326S038000, C326S039000

Reexamination Certificate

active

10796501

ABSTRACT:
A method and system for reducing power consumption in a programmable logic device (PLD) is provided. The power consumption may be reduced by preferably continually considering power consumption as a factor in circuit design during the technology mapping, routing, and period following routing of the programmable logic device.

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