Electrical computers and digital processing systems: processing – Processing control – Arithmetic operation instruction processing
Reexamination Certificate
2007-05-08
2007-05-08
Tsai, Henry W. H. (Department: 2181)
Electrical computers and digital processing systems: processing
Processing control
Arithmetic operation instruction processing
C708S523000
Reexamination Certificate
active
10646787
ABSTRACT:
A programmable processor that comprises a general purpose processor architecture, capable of operation independent of another host processor, having a virtual memory addressing unit, an instruction path and a data path; an external interface; a cache operable to retain data communicated between the external interface and the data path; at least one register file configurable to receive and store data from the data path and to communicate the stored data to the data path; and a multi-precision execution unit coupled to the data path. The multi-precision execution unit is configurable to dynamically partition data received from the data path to account for an elemental width of the data and is capable of performing group floating-point operations on multiple operands in partitioned fields of operand registers and returning catenated results. In other embodiments the multi-precision execution unit is additionally configurable to execute group integer and/or group data handling operations.
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Hansen Craig
Moussouris John
Microunity Systems Engineering, Inc.
Tsai Henry W. H.
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