Semiconductor memory device with plural source/drain regions

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S383000, C257S384000, C257S903000

Reexamination Certificate

active

10996456

ABSTRACT:
A semiconductor memory device includes first and second source/drain regions, and first and second semiconductor regions. The first source/drain region of a first conductive type is formed in a first well region of a second conductive type for a pair of first MIS-type transistors of the first conductive type. The second source/drain region of the second conductive type is formed in a second well region of the first conductive type for a pair of second MIS-type transistors of the second conductive type. The first semiconductor region of the second conductive type is formed in the first source/drain region. The second semiconductor region of the first conductive type is formed in the second source/drain region.

REFERENCES:
patent: 6031267 (2000-02-01), Lien
patent: 6037625 (2000-03-01), Matsubara et al.
patent: 6188614 (2001-02-01), Hsu et al.
patent: 2001-358232 (2001-12-01), None
patent: 2002-343890 (2002-11-01), None
patent: 2003-60088 (2003-02-01), None

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