Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2007-05-29
2007-05-29
Sough, Hyung (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S145000, C711S202000
Reexamination Certificate
active
10813891
ABSTRACT:
A system may include several nodes coupled by in inter-node network. Each node includes several active devices coupled by an address network. The address network included in one of the nodes may be configured to convey address packets specifying a particular coherency unit in broadcast mode. The address network included in a different one of the nodes may be configured to convey address packets specifying that coherency unit in point-to-point mode.
REFERENCES:
patent: 5761721 (1998-06-01), Baldus et al.
patent: 5802582 (1998-09-01), Ekanadham et al.
patent: 5860109 (1999-01-01), Hagersten et al.
patent: 5864671 (1999-01-01), Hagersten et al.
patent: 5887138 (1999-03-01), Hagersten et al.
patent: 6088768 (2000-07-01), Baldus et al.
patent: 6209064 (2001-03-01), Weber
patent: 6496854 (2002-12-01), Hagersten et al.
patent: 6862665 (2005-03-01), Neefs
patent: 6883070 (2005-04-01), Martin et al.
“Specifying and Verifying a Broadcast and a Multicast Snooping Cache Coherence Protocol”, Sorin, et al,IEEE Transactions on Parallel and Distributed Systems, vol. 13, No. 6, Jun. 2002, http://www.cs.wisc.edu/multifacet/papers/tpds02—lamport.pdf.
“Multicast Snooping: A New Coherence Method Using a Multicast Address Network”, Bilir, et al,The 26thInternational Symposium on Computer Architecture, IEEE, Atlanta, GA, May 2-4, 1999, http://csdl.computer.org/comp/proceedings/isca/1999/0170/00/01700294abs.htm.
“Architecture and Design of AlphaServer GS320”, Gharachorloo, et al,ACM Sigplan Notices, vol. 35, Issue 11, Nov. 2000, http://portal.acm.org/citation.cfm?id=356991&dl=ACM&coll=portal.
“View Caching: Efficient Software Shared Memory for Dynamic Computations”, Karamcheti, et al,11thInternational Parallel Processing Symposium, Geneva, Switzerland, Apr. 1-5, 1997, http://ipdps.eece.unm.edu/1997/s13/318.pdf.
“Cache-Coherent Distributed Shared Memory: Perspectives on Its Development and Future Challenges”, Hennessy, et al,Proceedings of the IEEE, vol. 87, Issue 3, Mar. 1999, ISSN 0018-9219, http://cva.stanford.edu/cs99s/papers/hennessy-cc.pdf.
“Survey on Cache Coherence in Shared & Distributed Memory Multiprocessors”, Garg, et al, Online, http://www.cse.psu.edu/˜cg530/proj03/cache—coherence.pdf.
“A Survey of Cache Coherence Mechanisms in Shared Memory Multiprocessors”, Lawrence, Department of Computer Science, University of Manitoba, Manitoba, Canada, May 14, 1998, http://www.cs.uiowa.edu/˜rlawrenc/research/Papers/cc.pdf.
“Bandwidth Adaptive Snooping”, Martin, et al.8thAnnual International Symposium on High-PerfomanceComputer Architecture(HPCA-8), Cambridge, MA, Feb. 2-6, 2002.
“Timestamp Snooping: An Approach for Extending SMPs”, Martin, et al.,9thInternational Conference on Architectural Support for Programming Languages and Operating Systems(ASPLOS-IX), Cambridge, MA, Nov. 13-15, 2000.
Kivlin B. Noäl
Meyertons Hood Kivlin Kowert & Goetzel P.C.
Patel Kaushik
Sough Hyung
Sun Microsystems Inc.
LandOfFree
Multi-node computer system in which networks in different... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Multi-node computer system in which networks in different..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multi-node computer system in which networks in different... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3770915