Semiconductor memory device and manufacturing method therefor

Details Semiconductor memory device and manufacturing method therefor Semiconductor memory device and manufacturing method therefor

2007-04-10

2007-04-10

Huynh, Andy (Department: 2818)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

C438S216000, C438S261000, C438S587000, C438S591000, C257SE21679

Reexamination Certificate

active

11155849

ABSTRACT:
A semiconductor memory device, adapted for storing plural bits per cell to be able to accomplish high storage density by a simplified structure, includes a plurality of first gate electrodes extending parallel to one another along one direction and a plurality of second gate electrodes extending in a direction of intersecting the first gate electrodes, in which a diffusion region is provided on each of a plurality of divisions demarcated in a matrix-like pattern by first and second electrodes on a substrate surface. One of the divisions, the four sides of which are defined by two neighboring first gate electrodes and two neighboring second gate electrodes, has four independently accessible bits, and is connected by a contact (CT) with a diffusion region in the division. There are provided a plurality of interconnections connected via contacts to the diffusion regions of other divisions in the plural matrix-like divisions lying on the line of extension of the aforementioned diagonal line. A plurality of the aforementioned interconnections are arranged for extending parallel to one another in the memory cell array in an oblique direction relative to the lattice of the first and second electrodes.

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