Metal interconnection lines of semiconductor devices and...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S926000, C257SE23001, C257SE21575, C257SE23151, C257SE21627, C257SE21641

Reexamination Certificate

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11009723

ABSTRACT:
Metal interconnection lines of semiconductor devices and methods of forming the same are disclosed. Improved reliability is achieved in a disclosed metal line of a semiconductor device by preventing metal layers from eroding and preventing metal lines from being destroyed due to electro-migration (EM) and stress-migration (SM). An illustrated metal interconnection line includes: a semiconductor substrate; a metal pattern on the substrate; a glue pattern under the metal pattern; an anti-reflection pattern on the metal pattern; and dummy patterns surrounding side walls of the metal pattern.

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patent: 0147195 (1998-05-01), None
patent: WO 2004/053948 (2004-06-01), None

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